1. Adaptive Channel SVD Estimation for MIMO-OFDM Systems (Simulation)
2. Iterative MIMO Channel SVD Estimation (Simulation).
3. In-building power lines as high-speed communication channel (Simulation)
4. Channel characterization and a test channel ensemble (Simulation)
5. A Generalized Model for the Combined Output Statistics of MRC Diversity Systems in Nakagami Fading Channels (Simulation)
6. Multirate Performance in Multiuser MMSE and Decorrelating Detectors Simulation.
7. Selection and performance analysis of Spreading Sequences for AWGN Channels. (Simulation)
8. An Upper Bound for Sum Capacity of Binary Random Synchronous CDMA Channel (Simulation)
9. Improving DVB-T forward error correction by Concatenated Turbo code scheme (Simulation)
10. Parallel VLSI Architecture and Parallel Interleaver Design for Low-Latency MAP Turbo Decoders (Simulation / VLSI)
11. Novel Cross-Diamond-Hexagonal Search Algorithms for Fast Block Motion Estimation (Simulation)
12. Enhanced Hexagonal Search for Fast Block Motion Estimation (Simulation)
13. Adjustable Partial Distortion Search Algorithm for Fast Block Motion Estimation (Simulation)
14. Fast block-matching motion estimation by recent-biased search for multiple reference frames (Simulation)
15. MPEG-7 Dominant Color Descriptor Based Relevance Feedback Using Merged Palette Histogram (Simulation)
16. Pyramid methods in image processing – Performance Analysis (Simulation)
17. Dominant colour image retrieval using merged histogram(Simulation)
18. Context-Based Entropy Coding of Block Transform Coefficients for Image Compression (Simulation)
19. Adaptive Image Compression for Wireless Multimedia Communication (Simulation)
20. Performance Analysis of Image Compression Using Wavelets (Simulation)
21. Down-Scaling for Better Transform Compression (Simulation)
22. Performance of Coherent Square M-QAM in Wireless Frequency Non -selective Slowly Fading Channels (Simulation)
23. Performance Analysis of MC DS-CDMA in the Presence of Partial Band Interference (Simulation)
24. A Behavior Description and Simulation of an Optical Bit-Interleaving Time-Division Multiplexing System Using VLSI
25. Biomedical image enhancement using Median Filtering. (Simulation)
26. Speckle noise removal in radar images. (Simulation)
27. Design of LCWM from the linear filters. (Simulation)
28. Design of Mean Filter for improved performance in noise removal.(Simulation)
29. Performance analysis and comparison techniques of Median Filters. (Simulation)
30. Switched median filters for noise removal in biomedical images. (Simulation)
31. Design for Adaptive center weighted median filters with improved PSNR. (Simulation/implementation)
32. Simulation of Parallel interference cancellation for MUD detection scheme. (Simulation)
33. Simulation of Successive interference cancellation for MUD detection scheme.(Simulation)
34. Simulation of Decorrelating Detector for CDMA system. (Simulation)
35. Frequency domain Echo Cancellation for audio signal. (Simulation/VLSI)
36. 3D model development using stereo matching. (Simulation)
37. VLSI implementation of mean filtering.(VLSI)
38. VLSI Implementation of CORDIC processor for frequency synchronizer in multi-carrier system.(VLSI)
39. Simulation of LMS and Matrix Inversion algorithm for spatial adaptive interference rejection. (Simulation)
40. Self orthogonalizing algorithm for adaptive beam forming. (Simulation)
41. BER performance over fading channel and diversity combining. (Simulation)
42. BER performance of baseband binary transmission. (Simulation)
43. Simulation and Analysis of DQPSK for Rayleigh fading and AWGN channel.(Simulation)
44. Channel estimation and tracking for CDMA system. (Simulation)
45. Channel estimation for Space time channel. (Simulation)
46. Delay estimation for Multipath Space time channel. (Simulation)
47. High speed indoor wireless connectivity using frequency domain modulation technique. (Simulation/VLSI)
48. Zero tree coding using Wavelets. (Simulation)
49. Face recognition using PCA method. (Simulation)
50. Face recognition using LDA method. (Simulation)
51. High speed filter design for base band pulse shaping.
52. Real time frequency spectrum computation using sliding FFT. (Simulation)
53. Practical blind demodulators for higher order QAM constellation signals. (Simulation)
54. Speech compression using LPC. (Simulation)
55. Speech compression PCM. (Simulation)
56. VLSI implementation of high speed FFT processor for multi carrier modulation systems. (VLSI)
57. MIL STD 1553 Bus Controller design. (VLSI)
58. Frame synchronization of OFDM systems in frequency selective fading channels. (Simulation)
59. Channel Estimation for Viterbi Equalization. (Simulation)
60. Segmentation for VOP generation in MPEG-4. (Simulation/VLSI)
61. Chirp signal generation and post processing in sub bottom profiler. (Simulation)
62. Time reversal acoustic Communication system. (Simulation)
63. Time reversal acoustic as applied to kidney stone destruction(Simulation).
64. 4 bit Micro-processor design.(VLSI)
65. Quadrature Mirror Filter Bank design for Wavelet transform. (Simulation/VLSI)
66. An equalization method for OFDM systems with multipath propagation, frequency offset and phase noise. (Simulation)
67. Analysis and simulation of a digital mobile channel for OFDM. (Simulation)
68. Differential modulation for an OFDM system. (Simulation/VLSI)
69. Channel equalization for OFDM based DVB – Transceiver. (Simulation/VLSI)
70. Implementation of Digital Audio Broadcasting Transceiver. (Simulation/VLSI)
71. VLSI implementation of digital symbol timing recovery for DTV transceivers. (Simulation/VLSI)
72. Blind equalization for QAM-256 signal constellation. ((Simulation/VLSI)
73. Non data aided symbol timing recovery for QAM receivers in flat fading channels. (Simulation/VLSI)
74. Analysis and simulation of Combined trellis coding and DFE. (Simulation)
75. Wavelet based embedded image coding. (Simulation)
76. Subband coding of images using QMFs. (Simulation)
77. VLSI implementation of sub band coding for HDTV using QMFs.(VLSI)
78. VLSI architecture for Daubechies wavelet transform without multiplier.(VLSI)
79. VLSI Implementation of Radix 4 Complex FFT.(VLSI)
80. VLSI Implementation of Low Power FIR Filter.(VLSI)
81. VLSI Implementation of Generic FIFOs.(VLSI)
82. Surveillance System design based on motion detection.(Simulation)
83. Voice compression and decompression using sub-band filtering. (Simulation)
84. Simulation and performance analysis of PCM. (Simulation)
85. Simulation and analysis of coherent FSK detection. (Simulation)
86. Simulation and analysis of ASK and phase reversal keying. (Simulation)
87. Simulation and analysis of FM characteristic in Frequency domain using modern PLL FM demodulator. (Simulation)
88. Simulation and analysis of PLL and its application for AM detection. (Simulation)
89. Detecting Coins using Hough Transform. (Simulation).
90. Gaussian Minimum Shift Keying Modulation and Demodulation.
91. Effects of Equalization on A QAM Based Modulation Scheme.
92. Implementation of Pi/4 Differential Quadrature Phase Shift Keying Modem.
93. Quadrature Amplitude Modulation (M-QAM) – simulation and performance analysis by changing constellation.
94. CDMA Modem – comparison of performace on various configurations.
95. BPSK Receiver simulation using spread spectrum Techniques.
96. Simulation of Speech Recognition algorithm and real time testing.
97. Subtractive Synthesis of Violin Sound.
98. Acoustic Echo Cancellation using NLMS and FNLMS Techniques.
99. Frequency Domain Blind MIMO System Identification Based on Second-and Higher order Statistics.
100. A Low Complexity Algorithm for Proportional Resource Allocation in OFDMA Systems.
101. Spectrum Sharing Through Dynamic Channel Assignment For Open Access To Personal Communications Services.
102. Sum Power Iterative Water-Filling for Multi-Antenna Gaussian Broadcast Channels.
103. Relative Location Estimation in Wireless Sensor Networks.
104. BPSK Modem – simulation for various channel times including underwater channel.
105. GMSK Modem with Symbol Synchronization.
106. Two Contributions to Blind Source Separation Using Time-Frequency Distributions.
107. A Simple transmit diversity technique for wireless communications - simulation.
108. Model of Independent Rayleigh Faders
109. New Detection Schemes for transmit diversity with no channel estimation.
110. The Finite-Length Multi-Input Multi-Output MMSE DFE.
111. Orthogonal Frequency Division Multiplexing for Wireless Networks.
112. Blind Two-Input-Two Output FIR Channel Identification Based On Frequency Domain Second Order Statistics.
113. Vertex Component Analysis: A Fast Algorithm to Unmix Hyper Spectral Data.
114. Beamforming for SONARS based on filters.
115. Adaptive Resource Allocation in Multiuser OFDM Systems with proportional Rate Constraints.
116. Blind Identification of Convolutive MIMO System with 3 sources 2 sensors.

1. UART Module for Real Time Application.
2. PCI controller design for Real time application.
3. Low power Register Exchange Viterbi Decoder for Wireless Applications.
4. Design and Implementation of RS-Decoder in FPGA.
5. Design and Implementation of 8085 Microprocessor Architecture in FPGA.
6. Modeling and Implementation of 8051 Architecture.
7. Design and Implementation of ARM Processor in FPGA.
8. Data streaming over Ethernet Cable for real time application.
9. LCD controller and display of images for real time application.
10. Design and Implementation of PIC Microcontroller in FPGA.
11. Building a RISC Microcontroller in an FPGA.
12. Design and Implementations of Image Processing algorithms in FPGA .
13. Digital Sampling Oscilloscope Implemented on a Chip.
14. I2C controller design for Real time application.
15. Flash based boot up code for Real time applications.
16. Design and Implementation of SDRAM-Controller in FPGA\
17. VHDL Implementation of Coherent Digital GPS Signal Receiver.
18. Design and Implementation for Link/MAC layer protocols in FPGA.
19. FPGA-Based Single Chip Cryptographic Solution .
20. Design and Implementation of Advanced Encryption Standard in FPGA.
21. Design and Implementation of Wireless Communication Using RF in FPGA.
22. Design and Synthesis of OFDM Transmitter in FPGA for Wireless Communication.
23. Design and Synthesis of OFDM Receiver in FPGA.
24. Design of CDMA Based Communication system in FPGA.
25. Design of CORDIC Algorithm using VHDL
26. High-Speed Pipeline Implementation of Radix-2 DIF Algorithm.
27. A modified split-radix FFT with fewer arithmetic operations.
28. An analysis of FPGA-based UDP/IP stacks parallelism for embedded Ethernet Connectivity.
29. Alternatives to the discrete Fourier Transform.
30. Distributed Arithmetic Based Implementation of Fourier Transform Targeted at FPGA Architectures.
31. Implementation of CAN Controller with FPGA Structures.
32. A Novel Application of LDPC-Based Decoder for WiMax.
33. Split Vector-Radix-2/8 2-D Fast Fourier Transform.
34. Synchronization Techniques for Orthogonal Frequency Division Multiple Access (OFDMA)
35. Patents of Synchronization Techniques in Wireless OFDM Systems.
36. FPGA –based Fault Emulation of Synchronous Sequential Circuits.
37. FPGA based space Vector PWM Control IC for Three Phase Induction Motor Drive.
38. FPGA Implementation of Parallel pipelined Multiplier Less FFT Architecture
39. FPGA Implementation of High Speed FIR Filters Using ADD and Shift Method.
40. A spatial Median Filter for Noise Removal in Digital Images.
41. Hardware Implementation of 1D Wavelet Transform on an FPGA for Infrasound Signal Classification.
42. Configurable folder array for FIR Filtering.
43. A Detection Algorithm for zero-Quantized DCT Coefficients in JPEG.
44. Design and Implementation of Modular FPGA-based PID Controllers.
45. A Mixed-Radix 4-2 Butterfly with simple Bit Revering for ordering the output Sequences.
46. Weighted Overlap Co-Processor.
47. Design and Implementation of a High-speed Matrix Multiplier Based on Word-Width Decomposition.
48. Area efficient FIR Filters for high speed FPGA implementation.
49. A BIST TPG for Low Power Dissipation and High Fault Coverage.
50. Low-Power FPGA-Based Implementation of Decimating Filters For Multistandard Receiver.
51. Energy Efficient novel architectures for the lifting based discrete wavelet Transform.
52. Pipelined Array-Based FIR Filter Folding.
53. Power Modeling and Efficient FPGA Implementation of FHT for Signal Processing.
54. Low-Complexity High-speed Decoder Design for Quasi-Cyclic LDPC Codes.
55. Application Dependent Testing for FPGA.
56. A Technique for Transparent fault injection and simulation in VHDL.
57. Efficient FPGA Implementation of DWT and Modifier SPIHT for lossless image Compression
58. High-frequency pulse width modulation implementation using FPGA and CPLD ICs.
59. Transformation to improve computationally efficient IIR Decimation filters.
60. FPGA-Based Advance Real Traffic Light Controller System Design.
61. Novel FPGA Implementation of Walsh-Hadamard Transform for Signal Processing.
62. Hardware Implementation of an Echo-Canceller for DVB-T on-Channel Repeaters.
63. FPGA Implementation of FIR Filter with smallest Processor.
64. Weighted overlap co-processor.
65. Pipelined Array-Based FIR Filter Folding.
66. Optimization Technique’s for FPGA-Based Wave-Pipelined DSP Blocks.
67. FPGA Implementation of BIST.
68. VHDL Implementation of Reed Solomon Encoder.
69. FPGA Implementation of Area Efficient FIR.
70. Low-Power FPGA-Based Implementation of Decimating For Multi Standard Receiver.
71. A Low-Power FIR Filter using Combined Residue and Radix-2 Signed-Digit.
72. Design of CDMA System in FPGA Technology.
73. An Area-Efficient VLSI Implementation for Programmable FIR Filters based on a Parameterized Divide and Conquer Approach.
74. Deterministic Circular Self Test Path.
75. Low-Power multipliers based on new hybrid full adders.
76. An Optimized BIST Architecture for FPGA Look-up Table Testing.
77. FPGA Implementations of the DES and Triple-Des Masked Against Power Analysis attacks.
78. On the design of an FPGA-Based OFDM modulator for IEEE 802.16.
79. JPEG Encoder for Low-Cost FPGAs
80. FPGA Implementation of high performance elliptic curve cryptography
81. Partial Product reduction by using look-up tables for M_N multiplier.
82. Design and Verification of I2c Bus Controller.
83. Estimation of Power Consumption in FPGA Chips.
84. FPGA Based Intelligence System for Security
85. Run-length coding for embedded progressive wavelet based Image compression and decompression.
86. FPGA Implementation of Finite Impulse Response (FIR) Filter.
87. FPGA Implementation of Infinite Impulse Response (IIR) Filter.
88. Design and Implementation of Median Filter on FPGA Hardware.
89. A High level Implementation of a High Performance pipeline FFT in FPGA.
90. Pipeline Array Based FIR Filter Folding.
91. Digital Signal Processors using VLSI and FPGA
92. VLSI Implementation Strategies for Cryptography.
93. Building a RISC Microcontroller in an FPGA.
94. Parallel Synthesizable Implementation of 2D DCT in VHDL .
95. Design and Verification of I2C Bus Controller.
96. New Distributed Arithmetic Algorithm for Low-Power FIR Filter Implementation.
97. Implementation of CHIRP-Z Discrete Fourier Transform on Spartan III FPGA .
98. FPGA Implementation of Ethernet Protocol.
99. Design and Synthesis of OFDM in FPGA for Wireless Communication.
100. Behavioral VHDL Implementation of Coherent Digital GPS Signal Receiver.
101. Design of CORDIC Algorithm using VHDL.
102. VHDL Implementation of Phase Locked Loop.
103. Implementation of a Frequency Estimator using VHDL.
104. FPGA-Based Single Chip Cryptographic Solution.
105. Speed, Area, and Power Aspects of the Viterbi Decoder under Different ACS Structures.
106. FPGA Implementation of Simple DSP Processor.
107. Fuzzy Logic Controller in VHDL.
108. Design of Pseudo-Random Pattern Generator Implementation in VLSI.
109. Implementation of SDRAM Controller in FPGA.
110. VHDL Implementation of a Security Co-Processor
111. An Analysis of FPGA-based UDP/IP stacks parallelism for embedded Ethernet connectivity.
112. Design and Implementation of a High-Speed Matrix Multiplier Based on Word-Width Decomposition.
113. The ARM9 Family – High Performance Microprocessors for Embedded Applications.
114. An Area-Efficient Universal Cryptography Processor for Smart Cards.
115. FPGA Implementation of FIR Filter with smallest processor .
116. Virtex FPGA Implementation of a Pipeline Adaptive LMS.
117. Design and Implementation of a Acoustic Echo Canceller.
118. Efficient Sub-band coder Implementation for Portable Low-Power Applications.
119. Adaptive Image Compression Using Wavelet Transform Based on FPGA.
120. A Programmable concurrent video signal processor.
121. Architectures for Dynamic Data Scaling in 2/4/8k Pipeline FFT Cores.
122. The Implementation of Digit-Serial FIR Filters Based on FPGA
123. A New Approach to pipeline FFT Processor.
124. Implementations of Image Processing Algorithms on FPGA Hardware.
125. A High level Implementation of a High Performance pipeline FFT on FPGA .
126. Design of CDMA Based Communication System in FPGA.
127. Design and Implementation of Pulse Width Modulator (PMW) in FPGA.
128. Design a Floating Point addition and multiplication using VHDL.
129. A Digit-Serial Multiplier for Finite Field GF (2m).
130. Design and Implementation of a Lossless Parallel High-Speed Data Compression System.
131. Design a QAM Communication system in FPGA.
132. Design a Digital “/4 Quadrature Phase Shift Keying (“/4 QPSK) Modulator and Demodulator for High Speed Communications.
133. Design a High Speed FIFo in Spartan III-FPGA.
134. Implementation of Temperature Measurement Using FPGA.
135. Gold Code Generator in Spartan Devices.
136. Design of Pseudo-Random Pattern Generator Implementation in VLSI.
137. Phase Locked Loop Design for Transmitting and Receiving Sections in Optical Wireless Access.
138. ADC and DAC Interface with FPGA.
139. Design and Implementation of SPI bus controller in FPGA.
140. Design Sorting Algorithm Implementation in FPGA.
141. Design a 16-Bit Booth Multiplier with 32-Bit Accumulate in FPGA.
142. Quantitative Analysis of Floating Point Arithmetic on FPGA Based Custom Computing Machines.
143. Design and Implementation of a Lossless Parallel High-Speed Data Compression System.
144. Speed and Direction Control of Stepper Motor Using FPGA.
145. FPGA Based Home Automation.
146. Implementation of a frequency estimation using VHDL.
147. Design and Implementation of an Acoustic Echo Canceller.
148. A Digit-Serial Multiplier for Finite Field GF (2m).
149. An analysis of FPGA-based UDP/IP stacks parallelism for embedded Ethernet Connectivity (FPGA Implementation).
150. Design and Implementation of a High-Speed Matrix Multiplier Based on Word-Width Decomposition .
151. An Area-Efficient Universal Cryptography Processor for Smart Cards .
152. Virtex FPGA Implementation of a Pipelined Adaptive LMS .
153. Efficient Sub-band Coder Implementation for Portable Low-Power Applications.
154. A Programmable Concurrent Video signal processor.
155. Architectures for Dynamic Data Scaling in 2/4/8k Pipeline FFT Cores.
156. The Implementation of Digit-Serial FIR Filters Based on FPGA.
157. Parallel Synthesizable Implementation of 2D DCT in VHDL.
158. Implementations of Image Processing Algorithms on FPGA Hardware.
159. Implementation of CHIRP-Z Discrete Fourier Transform on Spartan III FPGA.
160. New Distributed Arithmetic Algorithm for Low-Power FIR Filter Implementation.

1. Video Data Mining
2. Speckle Reducing Anisotropic Diffusion
3. Silhouette Analysis-Based Gait Recognition For Human Identification
4. Morphological Gray Scale Reconstruction In Image Analysis: Application And Efficient Algorithms
5. A Multiresolution Spline With Application to Image Mosaics
6. Better Foreground Segmentation Through Graph Cuts
7. Suspaces of Quantization Artifacts For Image Transform Compression
8. Recursive Gabor Filtering
9. Target Recognition
10. Image Compression & Reconstruction of Images
11. A Phase-Based Approach to the Estimation of the Optical Flow Field Using Spatial Filtering
12. Design of Optimal Minimum Phase Digital FIR Filters using Hilbert Transform
13. Discrete Cosine Transform of the Geomagnetic Signature
14. Wavelet Based Image Restoration
15. Iris Recognition
16. Surveillance System using Motions Detection
17. Image Restoration to improve the quality of blurred images.
18. Wavelet Based Image Compression Implementation using SOFM
19. Edge Detection using Markov Chains
20. Image Restoration using and MRF-based algorithm
21. Image Watermarking Technique
22. DCT-Based Image Watermarking
23. Eye Detection and Tracking for Driver Fatique.
24. Recovery of Corrupted DCT coded Images.
25. Adaptive two-pass Median Filter.
26. Vehicle License plate Recognition System.
27. MRI Brain Scanning.
28. Graphics Compression
29. Face Recognition System
30. Handwriting Recognition
31. Image and Sound Compression Using Wavelet
32. Reverberant Speech Enhancement
33. Scene Change Detection Using DCT Features in Transform Domain Video Indexing
34. Rotation Optimization for MPSK/MQAM signal Constellations over Rayleigh Fading Channels
35. Enhancement of Retinal fundus Image to highlight the features for detecting of abnormal eyes
36. Extended Golomb Code for Integer Representation
37. PWL based Image Enhancement
38. Eye Detection on facial Color Images
39. Visual Features based TV Commercial Detection
40. Voice Activity Detection Based on GM(1,1) Model
41. Medical Images Edge Detection Based on Mathematical Morphology
42. Voice Activity Detection Based on Auto-Correlation Function Using Wavelet Transform and Teager Energy Operator
43. DCT-Based Iris Recognition
44. Background Subtraction and Motion Detection Based Video Surveillance System
45. Robust Vehicle Detection System
46. Histogram Based Fast Scene Change Detection
47. Mathematical-Morphology-based edge Detectors for Detection of the edges in low- contrast regions
48. Texture analysis and Synthesis
49. A Two-Stage Algorithm for One-Microphone Reverberant Speech Enhancement (IEEE-2006)
50. The Design and Use of Steerable Filters (IEEE-1991)
51. The Design of Fractional Delay FIR Filter (IEEE-2003)
52. Voice Activity Detection Based on Auto-Correlation Function Using Wavelet Transform and Teager Energy Operator (IEEE-1999)
53. Wavelet Analysis and Time Frequency Atoms Based Approach to Power Quality Monitoring
54. Audio Special Effects (Echo, Reverb, Flanging…)
55. Acoustic Echo Cancellation using NLMS and FNLMS Techniques
56. Vertex Component Analysis: A Fast Algorithm To Unmix Hyper Spectral Data (IEEE- 2004)
57. License Plate Recognition System
58. Video Text Extraction From Images for Character Recognition
59. Holographic Image Representation
60. Accurate Breast Region Detection in Digital Mammograms
61. Endocardial Edge Detection By Fuzzy Inference System
62. A Novel Technique for Fingerprint Feature Extraction
63. Eye Detection and Tracking for Drowsy Drivers
64. Transform Coefficient Histogram-Based Image Contrast Enhancement

[Individual modules for microcontroller based Projects, which can be integrated for a particular application] 1. Scanning 7-segment display and keypad using Microcontroller.
2. Driving dot LED using Microcontroller.
3. Microcontroller based stepper motor interface
4. Mains clock controller using Microcontroller.
5. AT89C2051/4051 Easy-Downloader
6. AT89C2051 real-time controller
7. Microcontroller based Night light saver.
8. Atmel 8051 Flash Based-Microcontroller Programmer
9. Digital thermometer and clock using Microcontroller.
10. Serial to parallel converter using the AT89C2051
11. AT89C2051 serial COMs to LED driver
12. AT89C2051 line-follower robot
13. 8051 Development System Circuit Board
14. Temperature controlled based on AT89CX051
15. Interfacing push on switches and relays with 89C51.Program to switch on-off relay.
16. Interfacing 1x16 line text LCD with 89C51 to program to display text messages.
17. Interfacing 4x4 key Matrix with 89C51.
18. Interfacing ADC 0808 with 89C51.
19. Generating pulses on port with different duty cycle using timers interrupt with 89C51
20. Program to send messages through RS232C Serial port using 89C51
21. Interfacing of DC motor using 89C51
22. PC to PC communication using IR transceiver.
23. PULSE READING USING AT89C51 MICROCONTROLLER
24. Microcontroller based Stepper motor and DC Motor controller using IR.
25. AT89C51 Microcontroller based motor control application for leather industry.
26. Open stadium intensity maintenance control using Microcontroller.
27. Ultra sonic obstacle detector.
28. Ultra sonic range finder.

Any other projects suggested by the Students/Staffs, based on published IEEE papers can also be undertaken. Abstract of the above mentioned projects will be sent on request by mail.